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5 research outputs found

Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation

Author: C.C.N. Chu
Chung-Ping Chen
D.F. Wong
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date
Field of study

Nonrectangular Shaping and Sizing of Soft Modules for Floorplan-Design Improvement

Author: C.C.N. Chu
E.F.Y. Young
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date
Field of study

A matrix synthesis approach to thermal placement

Author: C.C.N. Chu
D.F. Wong
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date
Field of study

An efficient and optimal algorithm for simultaneous buffer and wire sizing

Author: C.C.N. Chu
D.F. Wong
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date
Field of study

Handling soft modules in general nonslicing floorplan using Lagrangian relaxation

Author: C.C.N. Chu
F.Y. Young
W.S. Luk
Y.C. Wong
Publication venue: 'Institute of Electrical and Electronics Engineers (IEEE)'
Publication date
Field of study

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